A process of plasma etching silicon nitride from a multilayer structure is disclosed in European Patent Publication EP 908940 A2. According to this publication, an etchant gas comprising 4-20 volume % of a fluorocarbon gas, (i.e., CF4, C2F6, C3F8), 10-30 volume % of a hydrogen source (i.e, CH2F2, CH3F, H2), and 40-70 volume % of a weak oxidant (i.e., CO, CO2, O2) is excited to form a high density plasma (i.e., above 1011 ions/cm3) and the plasma is used to etch a nitride layer located between a silicon substrate and an oxide or photoresist overlayer.
U.S. Pat. No. 6,153,514 discloses a method of forming a self-aligned dual damascene structure which includes a lower conductive layer (e.g., copper or copper alloy), a first etch stop layer (e.g., silicon nitride), a first dielectric layer (e.g., low k dielectric material wherein k<4), a second etch stop layer (e.g., silicon nitride), a second dielectric layer (e.g., low k dielectric material), a hard mask layer (e.g., silicon nitride), and a photoresist layer patterned to provide the feature to be etched into the second dielectric layer. According to this patent, the nitride hard mask layer is etched with CHF3/N2, the second dielectric layer is etched with N2/H2O2 or N2/H2, the second etch stop layer is etched with CHF3/N2 and the first dielectric layer is etched with C4F8/Ar/O2/CO. U.S. Pat. No. 5,611,888 discloses a method of plasma etching silicon nitride using a mixture of 10-20 sccm Freon 23 (CHF3) and 70-110 sccm O2.
U.S. Pat. No. 6,156,642 discloses a dual damascene structure wherein a semiconductor substrate includes a bottom metallization layer (e.g., copper), a topping layer (e.g., silicon nitride), a dielectric layer (e.g., silicon oxide or other low k material), a conformal layer (e.g., titanium, titanium nitride, tantalum, tantalum nitride, tungsten nitride) covering sidewalls of a trench and via hole, and a passivation layer (e.g., silicon nitride or silicon carbide). U.S. Pat. No. 6,143,641 discloses a dual damascene structure in an integrated circuit structure which includes an intermetal dielectric material (e.g., SiO2) on an underlying conductive material (e.g., aluminum or copper), an adhesion layer (e.g., Ti, TiN, Ta) on exposed sidewalls of the dual damascene via structure which is filled with copper, a barrier metal or layer of silicon nitride, and additional layers including a low k dielectric material, silicon dioxide and silicon nitride.
U.S. Pat. No. 5,786,276 discloses a chemical downstream etching technique intended to be selective to silicon nitride over silicon oxide using a CH3F/CF4/O2 recipe and a CH2F2/CF4/O2 recipe.
As device geometries become smaller and smaller, the need for high etch selectivity is even greater in order to achieve plasma etching of openings in dielectric layers such as silicon nitride. Accordingly, there is a need in the art for a plasma etching technique which provides high etch selectivity.